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Semiconductor Process ­Reliability in Practice

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Format
Hardback, 624 pages
Published
United States, 1 October 2012

Publisher's Note: Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product.
Proven processes for ensuring semiconductor device reliability

Co-written by experts in the field, Semiconductor Process Reliability in Practice contains detailed descriptions and analyses of reliability and qualification for semiconductor device manufacturing and discusses the underlying physics and theory. The book covers initial specification definition, test structure design, analysis of test structure data, and final qualification of the process. Real-world examples of test structure designs to qualify front-end-of-line devices and back-end-of-line interconnects are provided in this practical, comprehensive guide.

Coverage includes:

  • Basic device physics
  • Process flow for MOS manufacturing
  • Measurements useful for device reliability characterization
  • Hot carrier injection
  • Gate-oxide integrity (GOI) and time-dependentdielectric breakdown (TDDB)
  • Negative bias temperature instability
  • Plasma-induced damage
  • Electrostatic discharge protection of integrated circuits
  • Electromigration
  • Stress migration
  • Intermetal dielectric breakdown

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HK$1,488
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Product Description

Publisher's Note: Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product.
Proven processes for ensuring semiconductor device reliability

Co-written by experts in the field, Semiconductor Process Reliability in Practice contains detailed descriptions and analyses of reliability and qualification for semiconductor device manufacturing and discusses the underlying physics and theory. The book covers initial specification definition, test structure design, analysis of test structure data, and final qualification of the process. Real-world examples of test structure designs to qualify front-end-of-line devices and back-end-of-line interconnects are provided in this practical, comprehensive guide.

Coverage includes:

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Product Details
EAN
9780071754279
ISBN
007175427X
Other Information
Illustrated
Dimensions
22.9 x 15.2 x 3.3 centimeters (1.05 kg)

About the Author

Zhenghao Gan is a reliability technical manager at the Semiconductor Manufacturing International Corporation (SMIC), Shanghai, China. He has extensive technical and management experience in research and development of semiconductor reliability improvement, testing/characterization, problem solving, project management, modeling, and analysis.

Waisum Wong, Ph.D., is in charge of process reliability at the Semiconductor Manufacturing International Corporation (SMIC), Shanghai, China. He has extensive experience in power device development and modeling.

Juin J. Liou, Ph.D., is the Pegasus Distinguished Professor and UCF-Analog Devices Fellow in the Department of Electrical and Computer Engineering at the University of Central Florida. He has published eight books and has been awarded more than $9 million in research contracts and grants from federal agencies, state governments, and industry leaders.

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